PCBS(1)

NAME

pcbs, PC/Boundary-Scan Tester Platform.

SYNOPSIS

pcbs --check [-b <BSDL> | -e <emul> <pga>]

pcbs --execute <source.PAT> [<destination.PAT>]

pcbs --bsdl <BSDL> <source.PAT> <destination.PAT>

pcbs --emulbs <emul> <pga> <source.PAT> <destination.PAT>

DESCRIPTION

pcbs is a tool addressing a Boundary Scan card connected to the PC Printer parallel interface. This tool is able to :

- Automatically check the Boundary-scan device for Instruction register length, Bypass register length and Boundary-scan register length,

- Execute Boundary-scan patterns directly to the device,

- Translate functionnal patterns to Boundary-scan patterns using a BSDL description of the device Boundary-scan architecture,

- Translate functionnal patterns to Boundary-scan patterns using an ASCII description of the device Boundary-scan architecture for the specific emulbs31 card,

To use this tool, you must have a strong knowledge of Boundary-scan architecture and eventually Boundary-scan Description Language.

DEFINITION

We call "Boundary-scan patterns" patterns written for a device with Boundary-scan architecture using only the Test Acess Port interface (i.e TDI, TDO, TMS, TCK and eventually TRST).
We call "Functionnal patterns" patterns written for a device with Boundary- scan architecture(case of --bsdl option), but using the fonctionnal interface of the device or for a chip branched with the specific EMULBS31 card which emulated the boundary-scan device(--emulbs option).

CHECK MODE

pcbs --check [-b <BSDL> | -e <emul> <pga>] pcbs will send special patterns to the Boundary-scan device to find by itself the Instruction register length, the Bypass register length and the Boundary-scan register length. If a <bsdl> file is provided, it will compare the found values against the <bsdl> or <emul> + <pga> ones. See BSDL MODE or EMULBS MODE for more informations about these files.

If it cannot communicate with the device, pcbs will output an error message like :

Cannot check INSTRUCTION Register (longer than xxxx bits ???)
Check the card connection

EXECUTION MODE

pcbs --execute [-vp] <source.PAT> [ [-fs] <destination.PAT>] pcbs will send the "Boundary-scan patterns" <source.PAT> to the device. The EXECUTION MODE can be used with the BSDL MODE or EMULBS MODE to translate the functionnal patterns and send them directly to the device.
If <destination.PAT> is specified, it will save the results with format boundary(-s) or functionnal(-f). -v or --verbose mode display all behaves and warnings. It is very verbose, so use it only for debugging your patterns.
-p or --pattern followed by a number is to indicate the number of patterns to be loaded in memory in one sequence. It's an evidence you must decrease this number if you have problem of memory and swapping(-p=50 for example). you should also raise it if you are free of (-p all for example).

BSDL MODE

pcbs --bsdl [-vp] <BSDL> <source.PAT> <destination.PAT> pcbs will translate "Functionnal patterns" <source.PAT> to "Boundary-scan patterns" <destination.PAT> (see DEFINITIONS) using a Boundary-Scan Description Language file <BSDL>.
-v or --verbose mode display all behaves and warnings. It is very verbose, so use it only for debugging your patterns.
-p or --pattern followed by a number is to indicate the number of patterns to be loaded in memory in one sequence. It's an evidence you must decrease this number if you have problem of memory and swapping(-p=50 for example). you should also raise it if you are free of (-p all for example).

EMULBS MODE

pcbs --emulbs [-vp] <emul> <pga> <source.PAT> <destination.PAT> pcbs will translate "Functionnal patterns" <source.PAT> to "Boundary-scan patterns" <destination.PAT> (see DEFINITIONS) using ASCII description files. Users have to give connexions between the PGA block and the emulbs31 card and also between the PGA and the chip. pcbs runs faster if your connexions are only on some emulbs31 because of bypass.
-v or --verbose mode display all behaves and warnings. It is very verbose, so use it only for debugging your patterns.
-p or --pattern followed by a number is to indicate the number of patterns to be loaded in memory in one sequence. It's an evidence you must decrease this number if you have problem of memory and swapping(-p=50 for example). you should also raise it if you are free of (-p all for example).
--example for emul connexions file | --example for chip connexions file
--left-hand is for EMULBS connector| --left-hand is for PGA connector
--right-hand is for PGA connector  | --right-hand is for CHIP connector
                                   |
pcbs emul_connexions V2.0;         | pcbs pga_connexions version 2.0;
0    <=a:1 ;                       | a:1 <=in     ck  ;
185  <=r:16;                       | r:16<=out    y   ;
56   <=d:5 ;                       | d:4 <=in     i(0);
76   <=d:4 ;                       | d:5 <=in     i[1];
80   <=g:2 ;                       | g:2 <=inout  sh  ;
Vdd  <=e:6 ;                       | e:6 <=in   d_Vdd ;
d_Vss<=a:2 ;                       | a:2 <=in   d_Vss ;

SEE ALSO

pat(5), asimut(1), bsdl(5)